Analysis Of 8-Bit Counter Using Gdi With Clock Gating For Signal Processing Applications

Abstract

This paper presents the simulation of a 8-Bit Counter using GDI technique and GDI with CLOCKGATING technique .GDI (Gate Diffusion Input) is a new technique of low power digital circuit design and this technique allows reducing power consumption, delay and area of digital circuits, while maintaining low complexity of logic design. Clock gating is a popular technique used in many digital circuits for reducing dynamic power dissipation, by removing the clock signal when the circuit is not in use. The 8-bit counter is designed by using T-flip flop based on GDI technique. In this approach conventional GDI counter and GDI with CLOCKGATING based counter has been analyzed in terms of delay, power consumption and power delay product. All these parametric analysis had been carried out using Tanner EDA tool(16.01v). This is better technique when compared to CMOS and GDI existing techniques in terms of Power, Delay and Power delay product.